This invention relates to a method of producing monolithic integrated circuits and more particularly to radiation hardened monolithic bipolar linear integrated circuits.
Radiation hardening of semiconductor devices as used herein and in accordance with terminology in the art means to design and process semiconductor devices so that the affects of nuclear radiation to which the device may be exposed only minimally affects the performance of the device. As a general rule, improved radiation performance of a device will be obtained by reducing its size since the transient radiation may be assumed to impinge into its total volume and the larger the volume the greater the total transient radiation response. However, no matter how small the device is made, it must have some finite surface area on which radiation can impinge and modify the operation of the device and hence the circuit in which it operates. While the radiation may cause various spurious responses in the device, one of the main problems is induced photocurrents caused by the impinging transient radiation.
Gamma radiation produces large numbers of electron hole pairs both in the semiconductor body and in the dielectric used for surface passivation and isolation. In the passivating layer, most electrons either recombine with holes or escape through the metalization or to the semiconductor, but some holes will be trapped and contribute to a relatively permanent net positive charge. In the high conductivity bulk silicon, the electron-hole pairs recombine and have minor electrical affect in this short lifetime semiconductor material. However, in long lifetime material, such as used in the collectors of bipolar transistors, the electrons and holes may move in an "E" field or drift toward a PN junction where they are separated and appear as junction photocurrents. To minimize this photocurrent, it is necessary to provide a minimum collector thickness determined by the width of the depletion region at the collector base under a given maximum reverse voltage. This thickness criterion maximizes the doping for a given voltage rating. Thus, precise control of collector resistivity and thickness is essential.
In accordance with prior art processing of integrated circuits, it has been conventional to increase the doping concentration in selected areas of the surface of a semiconductor wafer to provide a buried layer. Then by selective etching and oxidizing steps, passivated moats are provided in the surface of the wafer. Then a polycrystalline silicon handle is deposited. The starting semiconductor substrate is then mostly removed to separate the semiconductor material into dielectrically isolated islands having the starting material conductivity at the surface and the more highly doped material appearing laterally across the bottom of the dielectrically isolated island. During the lapping and polishing of the starting substrate and the handle, it is virtually impossible to maintain the previous thickness of the starting material from island to island, especially from one side of the wafer to the other, or, in fact, even within the island itself. Since this material in general forms the collector region for a transistor, the nonuniform collector region is susceptible to the radiation affects aforementioned, resolves in induced photocurrents, and varies greatly from one device to the other relating to the difference in the thicknesses of the long lifetime collector volume.